Search

Biao Min

A high performance hardware architecture for non-negative tensor factorization
A robust background initialization algorithm with superpixel motion detection
High performance hardware architecture for singular spectrum analysis of Hankel tensors
A fast inter CU decision algorithm for HEVC
A Robust Background Initialization Algorithm with Superpixel Motion Detection
A Fully Pipelined Hardware Architecture for Intra Prediction of HEVC
Fast HEVC intra coding decision based on statistical cost and corner detection
A Fast CU Size Decision Algorithm for the HEVC Intra Encoder
A customizable Stochastic State Point Process Filter (SSPPF) for neural spiking activity
A Flexible and Customizable Architecture for the Relaxation Labeling Algorithm
Noise filtering and occurrence identification of mouse ultrasonic vocalization call
Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform