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Gavin Xiaoxu Yao

Parameter Space for the Architecture of FFT-Based Montgomery Modular Multiplication
Novel RNS Parameter Selection for Fast Modular Multiplication
Zero collision attack and its countermeasures on Residue Number System multipliers
Faster Pairing Coprocessor Architecture
Low complexity and hardware-friendly spectral modular multiplication
A High Speed Pairing Coprocessor Using RNS and Lazy Reduction
FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction
Counter Embedded Memory architecture for trusted computing platform
Reconfigurable Number Theoretic Transform architectures for cryptographic applications