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Theodore W. Berger

ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis
An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis
An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics
An FPGA based scalable architecture of a stochastic state point process filter (SSPPF) to track the nonlinear dynamics underlying neural spiking
Laguerre-volterra model and architecture for MIMO system identification and output prediction
VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel
A reconfigurable architecture for real-time prediction of neural activity
Real-Time Prediction of Neuronal Population Spiking Activity Using FPGA
A dual mode FPGA design for the hippocampal prosthesis
A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities
FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities
FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Spiking Activities
High-Performance and Scalable System Architecture for the Real-Time Estimation of Generalized Laguerre-Volterra MIMO Model From Neural Population Spiking Activity