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Yao Xin

A Versatility-Performance Balanced Hardware Architecture for Scene Text Detection
A Versatility-Performance Balanced Hardware Architecture for Scene Text Detection
High Throughput Hardware/Software Heterogeneous System for RRPN-Based Scene Text Detection
An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis
FPGA-Based High-Performance Collision Detection: An Enabling Technique for Image-Guided Robotic Surgery
An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics
An FPGA based scalable architecture of a stochastic state point process filter (SSPPF) to track the nonlinear dynamics underlying neural spiking
GPU-based biclustering for microarray data analysis in neurocomputing
Laguerre-volterra model and architecture for MIMO system identification and output prediction
VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel
A customizable Stochastic State Point Process Filter (SSPPF) for neural spiking activity
Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform