CALAS Advances Hardware Security with New Electronics Publication

Candice’s research paper on mitigating speculative cache-based covert channels in RISC-V systems has been accepted in Electronics, representing a significant contribution to CPU microarchitecture security.

Excellence has been recognized as Candice's groundbreaking research paper has been accepted for publication in Electronics! Her work, "TrackRISC: An Implicit Attack Flow Model and Hardware Microarchitectural Mitigation for Speculative Cache-Based Covert Channels," addresses critical security challenges in modern processor designs.

This achievement reflects exceptional collaboration, with significant contributions from co-authors Sanka, Henry, and Jeffrey, along with expert guidance from Prof. Patrick. The research introduces innovative hardware-level defenses against transient execution attacks, a growing concern in the RISC-V ecosystem and broader CPU microarchitecture community.

Candice’s dedication to addressing practical security challenges exemplifies CALAS’s mission of producing research that makes meaningful societal impact. Her invitation to collaborate with those interested in CPU microarchitecture, transient execution attacks, and RISC-V development reflects the collaborative spirit that drives our laboratory forward.

Congratulations to Candice and the entire team for this outstanding accomplishment!