Our paper “Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware” has been accepted for publication in the IEEE Transactions on Computers.
Our paper “Compact Constant Weight Coding Engines for the Code Based Cryptography” has been accepted for publication in the IEEE Transactions on Circuits and Systems II.
Our paper “Area-Time Efficient Architecture of FFT-Based Montgomery Multiplication” has been accepted for publication in the IEEE Transactions on Computers.
Congratulation for Benben Liu’s successful defense on his PhD thesis titled “Task Mapping Methodology for Heterogeneous Multicore System”, on 13th January, 2017.
A warm welcome to David after his 6-month exchange at University of Bremen, Germany.
A warm welcome to Winston after his 6-month exchange at University of California, Santa Barbara.
Our paper “A Bias-bounded Digital True Random Number Generator Architecture” has been accepted for publication by IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1).
Our paper “A Fully Pipelined Hardware Architecture for Intra Prediction of HEVC” has been accepted for publication on IEEE Transactions on Circuits and Systems for Video Technology.