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GPU-based biclustering for microarray data analysis in neurocomputing

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High-speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems

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Novel RNS Parameter Selection for Fast Modular Multiplication

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Series Expansion based Efficient Architectures for Double Precision Floating Point Division

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Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder

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A (σ)(δ) modulator using gain-Boost Class-C Inverter for Audio Applications

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A 0.8-V 230-(µ)W 98-dB DR Inverter-Based (Σ)(Δ) Modulator for Audio Applications

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A Flexible and Customizable Architecture for the Relaxation Labeling Algorithm

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A memory-based NFA regular expression match engine for signature-based intrusion detection

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A scalable RNS Montgomery multiplier over F(_mbox2(^mboxm))

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