Paper-Conference

A dual mode FPGA design for the hippocampal prosthesis

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An FPGA-based acceleration platform for auction algorithm

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Area-Efficient Architectures for Large Integer and Quadruple Precision Floating Point Multipliers

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Area-Efficient FPGA Implementation of Quadruple Precision Floating Point Multiplier

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Faster Pairing Coprocessor Architecture

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FPGA Implementation of SRAM-based Ternary Content Addressable Memory

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GPU-Based Biclustering for Neural Information Processing

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High Performance Reconfigurable Architecture for Double Precision Floating Point Division

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Low complexity and hardware-friendly spectral modular multiplication

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A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities

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