Paper-Conference

FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities

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FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Spiking Activities

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FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction

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Hydrate: Hybrid Reconfigurable Architecture Expressions

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Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform

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Counter Embedded Memory architecture for trusted computing platform

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Design Automation for Reconfigurable Interconnection Networks

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Reconfigurable Number Theoretic Transform architectures for cryptographic applications

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A High-Performance Hardware Architecture for Spectral Hash Algorithm

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Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems

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