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Design Automation for Reconfigurable Interconnection Networks

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Reconfigurable Number Theoretic Transform architectures for cryptographic applications

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A High-Performance Hardware Architecture for Spectral Hash Algorithm

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Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems

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Instrumented Multi-Stage Word-Length Optimization

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Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation

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Automating custom-precision function evaluation for embedded processors

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Reconfigurable Acceleration for Monte Carlo Based Financial Simulation

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Reconfigurable Elliptic Curve Cryptosystems on a Chip

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Ziggurat-based Hardware Gaussian Random Number Generator

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