Fast Deep Learning for Scientific Applications with FPGAs

As the integrated circuit (IC) complexity keeps increasing, the chip design cost is skyrocketing. There is a compelling need for design efficiency improvement through new electronic design automation (EDA) techniques. In this talk, I will present multiple design automation techniques based on machine learning (ML) methods, whose major strength is to explore highly complex correlations based on prior circuit data. These techniques cover various chip-design objectives and design stages, including layout, netlist, register-transfer level (RTL), and micro-architectural level. I will focus on the different challenges in design objective prediction at different stages, and present our customized solutions. In addition, I will share our latest observations in design generation with large language models.

Prof. Zhiyao XIE is an Assistant Professor in the Department of Electronic and Computer Engineering (ECE) at Hong Kong University of Science and Technology. He received his Ph.D. in 2022 from Duke University. His research focuses on electronic design automation (EDA) and machine learning for VLSI design. Prof. XIE has received multiple prestigious awards, including the UGC Early Career Award 2023, ACM Outstanding Dissertation Award in EDA 2023, EDAA Outstanding Dissertation Award 2023, MICRO 2021 Best Paper Award, ASP-DAC 2023 Best Paper Award, ACM SIGDA SRF Best Poster Award 2022, etc. During his Ph.D. studies, Prof. XIE also worked as a research intern at Nvidia, Arm, Cadence, and Synopsys. Prof. Zhiyao XIE, Assistant Professor Department of Electronic and Computer Engineering Hong Kong University of Science and Technology.