FPGA Architecture and Tool Research with Cross-Layer Optimization

Speaker

Prof. Yajun HA, Professor
Shanghai Tech University, China

Time

July 31st 2024 (Wed) at 16:00 HKT

Abstract

Field Programmable Gate Array (FPGA) combines the programmability of a processor with the relatively high performance of an application-specific integrated circuit. t is an important energy efficient computing platform. in the research of FPGA, we noticed that on the one hand, the architecture and design automation tools of FPGA have a high degree of interaction with each other. 0n the other hand. They face the challenges and opportunity of semiconductor underling process devices and the application of new upper layer algorithms. This talk will introduce our cross layer optimization of FPGA architecture and tool research from several aspects such as energy-efficient FPGA, process deviation-sensitive FPGA, scalable FPGA, and new FPGA applications.

Biography

Yajun HA received the B.S. degree from Zhejiang University, Hangzhou, China, in 1996, the M.Eng. degree from the National University of Singapore, Singapore, in 1999, and the Ph.D. degree from Katholieke Universiteit Leuven, Leuven, Belgium, in 2004, all in electrical engineering. He is currently a Professor at ShanghaiTech University, China. He has been awarded several important Natural Science and Foundation China (NSFC) funding, including “The Research Fund for International Senior Scientist” and “Major International (Regional) Joint Research Project”. He served as the Editor-in-Chief for the IEEE Trans. on Circuits and Systems II: Express Briefs (2022-2023). Before joining ShanghaiTech University, he was a Director of the IR-BYD Joint Lab at Institute for Infocomm Research, Singapore, and an Adjunct Associate Professor at the Department of Electrical & Computer Engineering, National University of Singapore. Prior to this, he was an Assistant Professor with National University of Singapore. His research interests are focused on energy efficient circuits and systems, including reconfigurable computing, ultra-low power digital circuits and systems, embedded system architecture and design tools for applications in robots, smart vehicles and intelligent systems. He has published more than 150 internationally peer-reviewed journal/conference papers on these topics.

He is the recipient of several IEEE/ACM Best Paper Awards.